smarc

smarchitectures

Alleluia. Sequentia.

Intro

smarc is a simulation-first RISC-V architecture workspace for developing and validating sequencing-oriented SoC designs.

The current focus is workloads where ordered data movement dominates: molecular data (for miniature DNA sequencing machines), sensor and image streams (for environmental observations), and path-planning traces (for autonomous vehicles). The project is split into two complementary environments:

  • smile validates core behavior: instruction semantics, traps/debugger flow, stall behavior, and core-visible counters.
  • smicro validates system behavior: memory arbitration, contention, cache and memory-control policy, and SoC topology.

In short: smile is core-centric, and smicro is fabric-centric.

Packages

  • smile – core model and programs
    • Tile1: a simple RV32 core with a clean MemoryPort interface
    • Tiny test programs and support code for instruction decode/execute
  • smicro – SoC harness and testbenches
    • Instantiates cores, DRAM, memory controllers, testers
    • Drives experiments via ./smicro -suite=... -topo=...

What can I do here?

  • Run protocol and DRAM tests (-suite=proto_*, -suite=hal_*)
  • Let the core run directly against DRAM (-suite=proto_core) and watch instruction traces
  • Evolve the core and memory system together, while keeping the same high-level driver interface

When to use smile vs smicro

Use smile for…

  • Checking what a small RISC-V program actually does to Tile1’s registers and memory
  • Stepping instruction-by-instruction with a debugger to debug decode/execute/trap behavior
  • Trying out CUSTOM-0 instructions and accelerators and verifying their results

Use smicro for…

  • Testing the MemCtrl ↔ DRAM protocol and timing with scripted traffic
  • Running Tile1 inside a small SoC harness to check system-level integration
  • Exploring how different memory latencies/topologies affect request/response timing

For more detail, see:

  • smile – Tile1 core, instruction decode/execute, and how it talks to memory
  • smicro – SoC wiring, memory paths, test suites
  • kernels – focused microkernel notes and run examples